Subversion Repositories idreammicro-avr

Rev

Rev 23 | Go to most recent revision | Blame | Compare with Previous | Last modification | View Log | Download | RSS feed

/**************************************************************************//**
 * \brief USART0 library
 * \author Copyright (C) 2011  Julien Le Sech - www.idreammicro.com
 * \version 1.0
 * \date 20090426
 *
 * This file is part of the iDreamMicro library.
 *
 * This library is free software: you can redistribute it and/or modify it under
 * the terms of the GNU Lesser General Public License as published by the Free
 * Software Foundation, either version 3 of the License, or (at your option) any
 * later version.
 *
 * This library is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
 * FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more
 * details.
 *
 * You should have received a copy of the GNU Lesser General Public License
 * along with this program. If not, see http://www.gnu.org/licenses/
 ******************************************************************************/


/**************************************************************************//**
 * \file usart0_m2560.c
 ******************************************************************************/


/******************************************************************************
 * Header file inclusions.
 ******************************************************************************/


#include "../usart0.h"

#include <usart/usart.h>

#include <useful/bits.h>
#include <useful/bool.h>

#include <avr/interrupt.h>
#include <avr/io.h>

#include <assert.h>
#include <stdint.h>
#include <stdlib.h>

/******************************************************************************
 * Private variable declarations.
 ******************************************************************************/


static usart__rx_complete_callback_t*           p_rx_complete           = NULL;
static usart__tx_complete_callback_t*           p_tx_complete           = NULL;
static usart__data_register_empty_callback_t*   p_data_register_empty   = NULL;

static usart__configuration_t configuration =
{
    .mode       = USART__MODE__ASYNCHRONOUS,
    .baudrate   = USART__BAUDRATE__9600,
    .data_size  = USART__DATA_SIZE__8_BITS,
    .stop_size  = USART__STOP_SIZE__1_BIT,
    .parity     = USART__PARITY__DISABLED
};

static bool double_speed_is_set = false;

/******************************************************************************
 * Private function prototypes.
 ******************************************************************************/


/**************************************************************************//**
 * \fn static inline uint16_t usart0__compute_ubrr(void)
 *
 * \brief Compute UBRR register value.
 *
 * \return UBRR value.
 ******************************************************************************/

static inline
uint16_t
usart0__compute_ubrr
(
    void
);

/******************************************************************************
 * Public function definitions.
 ******************************************************************************/


/**************************************************************************//**
 * \fn void usart0__initialize(usart__configuration_t* p_configuration)
 *
 * \brief Initialize USART0.
 *
 * \param[in] p_configuration   USART configuration. If null, default settings
 *                              will be used.
 *
 * Default settings:
 * - baudrate = 9600 bps;
 * - 8 data bits;
 * - 1 stop bit;
 * - no parity.
 ******************************************************************************/

void
usart0__initialize
(
    usart__configuration_t* p_configuration
){
    // If p_configuration is not null, use it!
    if (NULL != p_configuration)
    {
        configuration = *p_configuration;
    }

    // Set mode.
    usart0__set_mode(configuration.mode);

    // Set baud rate.
    usart0__set_baudrate(configuration.baudrate);
    usart0__set_double_speed(false);

    // Configure settings.
    usart0__set_data_size(configuration.data_size);
    usart0__set_stop_size(configuration.stop_size);
    usart0__set_parity(configuration.parity);
}

/**************************************************************************//**
 * \fn void usart0__set_baudrate(usart__baudrate_t baudrate)
 *
 * \brief Set USART0 baudrate.
 *
 * \param baudrate baudrate to set (in bauds per second)
 ******************************************************************************/

void
usart0__set_baudrate
(
    usart__baudrate_t baudrate
){
    configuration.baudrate = baudrate;

    uint16_t ubrr = usart0__compute_ubrr();
    UBRR0H = (uint8_t)(ubrr >> 8);
    UBRR0L = (uint8_t)ubrr;
}

/**************************************************************************//**
 * \fn void usart0__set_mode(usart__mode_t usart_mode)
 *
 * \brief Set USART0 mode.
 *
 * \param usart_mode Mode to set.
 ******************************************************************************/

void
usart0__set_mode
(
    usart__mode_t usart_mode
){
    // Check the preconditions.
    assert(USART__MODE__INVALID > usart_mode);

    configuration.mode = usart_mode;

    switch (usart_mode)
    {
        case USART__MODE__ASYNCHRONOUS:
        {
            BIT__RESET(UCSR0C, UMSEL01);
            BIT__RESET(UCSR0C, UMSEL00);
        }
        break;

        case USART__MODE__SYNCHRONOUS:
        {
            BIT__RESET(UCSR0C, UMSEL01);
            BIT__SET(UCSR0C, UMSEL00);
        }
        break;

        case USART__MODE__MASTER_SPI:
        {
            BIT__SET(UCSR0C, UMSEL01);
            BIT__SET(UCSR0C, UMSEL00);
        }
        break;

        case USART__MODE__INVALID:
        default:
        break;
    }
}

/**************************************************************************//**
 * \fn void usart0__set_data_size(usart__data_sizet data_size)
 *
 * \brief Set USART0 data size.
 *
 * \param data_size data size (in bits)
 ******************************************************************************/

void
usart0__set_data_size
(
    usart__data_size_t data_size
){
    configuration.data_size = data_size;

    switch (data_size)
    {
        case USART__DATA_SIZE__5_BITS:
        {
            BIT__RESET(UCSR0B, UCSZ02);
            BIT__RESET(UCSR0C, UCSZ01);
            BIT__RESET(UCSR0C, UCSZ00);
        }
        break;

        case USART__DATA_SIZE__6_BITS:
        {
            BIT__RESET(UCSR0B, UCSZ02);
            BIT__RESET(UCSR0C, UCSZ01);
            BIT__SET(UCSR0C, UCSZ00);
        }
        break;

        case USART__DATA_SIZE__7_BITS:
        {
            BIT__RESET(UCSR0B, UCSZ02);
            BIT__SET(UCSR0C, UCSZ01);
            BIT__RESET(UCSR0C, UCSZ00);
        }
        break;

        case USART__DATA_SIZE__8_BITS:
        {
            BIT__RESET(UCSR0B, UCSZ02);
            BIT__SET(UCSR0C, UCSZ01);
            BIT__SET(UCSR0C, UCSZ00);
        }
        break;

        case USART__DATA_SIZE__9_BITS:
        {
            BIT__SET(UCSR0B, UCSZ02);
            BIT__SET(UCSR0C, UCSZ01);
            BIT__SET(UCSR0C, UCSZ00);
        }
        break;

        default:
        break;
    }
}

/**************************************************************************//**
 * \fn void usart0__set_stop_size(usart__stop_size_t stop_size)
 *
 * \brief Set USART0 stop size.
 *
 * \param stop_size stop size (in bits)
 ******************************************************************************/

void
usart0__set_stop_size
(
    usart__stop_size_t stop_size
){
    configuration.stop_size = stop_size;

    if (USART__STOP_SIZE__1_BIT == stop_size)
    {
        BIT__RESET(UCSR0C, USBS0);
    }
    else
    {
        BIT__SET(UCSR0C, USBS0);
    }
}

/**************************************************************************//**
 * \fn void usart0__set_parity(usart__parity_t parity)
 *
 * \brief Set USART0 parity.
 *
 * \param parity parity to set
 ******************************************************************************/

void
usart0__set_parity
(
    usart__parity_t parity
){
    configuration.parity = parity;

    switch (parity)
    {
        case USART__PARITY__DISABLED:
        {
            BIT__RESET(UCSR0C, UPM01);
            BIT__RESET(UCSR0C, UPM00);
        }
        break;

        case USART__PARITY__EVEN:
        {
            BIT__SET(UCSR0C, UPM01);
            BIT__RESET(UCSR0C, UPM00);
        }
        break;

        case USART__PARITY__ODD:
        {
            BIT__SET(UCSR0C, UPM01);
            BIT__SET(UCSR0C, UPM00);
        }
        break;

        default:
        break;
    }
}

/**************************************************************************//**
 * \fn void usart0__set_double_speed(bool double_speed)
 *
 * \brief Set double speed.
 *
 * \param   double_speed    True to set double speed, false otherwise.
 ******************************************************************************/

void
usart0__set_double_speed
(
    bool double_speed
){
    double_speed_is_set = double_speed;

    if (double_speed_is_set)
    {
        BIT__SET(UCSR0A, U2X0);
    }
    else
    {
        BIT__RESET(UCSR0A, U2X0);
    }
}

/**************************************************************************//**
 * \fn void usart0__enable_receiver(void)
 *
 * \brief Enable USART 0 receiver.
 ******************************************************************************/

void
usart0__enable_receiver
(
    void
){
    BIT__SET(UCSR0B, RXEN0);
}

/**************************************************************************//**
 * \fn void usart0__disable_receiver(void)
 *
 * \brief Disable USART 0 receiver.
 ******************************************************************************/

void
usart0__disable_receiver
(
    void
){
    BIT__RESET(UCSR0B, RXEN0);
}

/**************************************************************************//**
 * \fn void usart0__enable_transmitter(void)
 *
 * \brief Enable USART 0 transmitter.
 ******************************************************************************/

void
usart0__enable_transmitter
(
    void
){
    BIT__SET(UCSR0B, TXEN0);
}

/**************************************************************************//**
 * \fn void usart0__disable_transmitter(void)
 *
 * \brief Disable USART 0 transmitter.
 ******************************************************************************/

void
usart0__disable_transmitter
(
    void
){
    BIT__RESET(UCSR0B, TXEN0);
}

/**************************************************************************//**
 * \fn uint8_t usart0__receive_byte(void)
 *
 * \brief Receive a byte on USART0.
 *
 * \return received byte
 ******************************************************************************/

uint16_t
usart0__receive_byte
(
    void
){
    // Wait for data to be received.
    while (!(UCSR0A & (1 << RXC0)));

    // Get received data.
    uint16_t received_byte = UDR0;

    if (USART__DATA_SIZE__9_BITS == configuration.data_size)
    {
        // If 9-bit data size, get 9th bit.
        uint8_t resh = UCSR0B;
        resh = (resh >> 1) & 0x01;
        received_byte = (resh << 8) | received_byte;
    }

    // Return received data from buffer.
    return received_byte;
}

/**************************************************************************//**
 * \fn usart0__transmit_byte(uint8_t byte_to_transmit)
 *
 * \brief Transmit a byte on USART0.
 *
 * \param byte_to_transmit byte to transmit
 ******************************************************************************/

void
usart0__transmit_byte
(
    uint16_t byte_to_transmit
){
    // Wait for empty transmit buffer.
    while (!(UCSR0A & (1 << UDRE0)));

    if (USART__DATA_SIZE__9_BITS == configuration.data_size)
    {
        // If 9-bit data size, copy 9th bit to TXB80.
        UCSR0B &= ~(1 << TXB80);
        if (byte_to_transmit & 0x0100)
        {
            UCSR0B |= (1 << TXB80);
        }
    }

    // Put data into transmit buffer, sends the data.
    UDR0 = byte_to_transmit;
}

/**************************************************************************//**
 * \fn void usart0__flush(void)
 *
 * \brief Flush USART0 receiver buffer.
 ******************************************************************************/

void
usart0__flush
(
    void
){
    uint8_t dummy = 0;
    while (UCSR0A & (1 << RXC0))
    {
        dummy = UDR0;
    }
}

/**************************************************************************//**
 * \fn void usart0__enable_rx_complete_interrupt(void)
 *
 * \brief Enable USART 0 receive complete interrupt.
 ******************************************************************************/

void
usart0__enable_rx_complete_interrupt
(
    void
){
    BIT__SET(UCSR0B, RXCIE0);
    sei();
}

/**************************************************************************//**
 * \fn void usart0__disable_rx_complete_interrupt(void)
 *
 * \brief Disable USART 0 receive complete interrupt.
 ******************************************************************************/

void
usart0__disable_rx_complete_interrupt
(
    void
){
    BIT__RESET(UCSR0B, RXCIE0);
    sei();
}

/**************************************************************************//**
 * \fn void usart0__set_rx_complete_callback(
 * const usart__rx_complete_callback_t* p_callback)
 *
 * \brief Set a callback to call when receive byte complete interrupt is
 * generated.
 *
 * \param[in]   p_callback  Callback to set.
 ******************************************************************************/

void
usart0__set_rx_complete_callback
(
    const usart__rx_complete_callback_t*  p_callback
){
    // Check the preconditions.
    assert(NULL != p_callback);

    p_rx_complete = p_callback;
}

/**************************************************************************//**
 * \fn void usart0__enable_tx_complete_interrupt(void)
 *
 * \brief Enable interrupt when TX complete.
 ******************************************************************************/

void
usart0__enable_tx_complete_interrupt
(
    void
){
    BIT__SET(UCSR0B, TXCIE0);
    sei();
}

/**************************************************************************//**
 * \fn void usart0__disable_tx_complete_interrupt(void)
 *
 * \brief Disable interrupt when TX complete.
 ******************************************************************************/

void
usart0__disable_tx_complete_interrupt
(
    void
){
    BIT__RESET(UCSR0B, TXCIE0);
    sei();
}

/**************************************************************************//**
 * \fn void usart0__set_tx_complete_callback(
 * const usart__tx_complete_callback_t*  p_callback)
 *
 * \brief Set a callback to call when TX is complete.
 *
 * \param[in] p_callback        Function to call.
 ******************************************************************************/

void
usart0__set_tx_complete_callback
(
    const usart__tx_complete_callback_t*  p_callback
){
    // Check the preconditions.
    assert(NULL != p_callback);

    p_tx_complete = p_callback;
}

/**************************************************************************//**
 * \fn void usart0__enable_data_register_empty_interrupt()
 *
 * \brief Enable interrupt when data register is empty.
 ******************************************************************************/

void
usart0__enable_data_register_empty_interrupt
(
    void
){
    BIT__SET(UCSR0B, UDRIE0);
    sei();
}

/**************************************************************************//**
 * \fn void usart0__disable_data_register_empty_interrupt()
 *
 * \brief Disable interrupt when data register is empty.
 ******************************************************************************/

void
usart0__disable_data_register_empty_interrupt
(
    void
){
    BIT__RESET(UCSR0B, UDRIE0);
    sei();
}

/**************************************************************************//**
 * \fn void usart0__set_data_register_empty_callback(
 * const usart__data_register_empty_callback_t*  p_callback)
 *
 * \brief Set a callback to call when data register is empty.
 *
 * \param[in] p_callback        Function to call.
 ******************************************************************************/

void
usart0__set_data_register_empty_callback
(
    const usart__data_register_empty_callback_t*  p_callback
){
    // Check the preconditions.
    assert(NULL != p_callback);

    p_data_register_empty = p_callback;
}

/******************************************************************************
 * Private function definitions.
 ******************************************************************************/


/**************************************************************************//**
 * \fn static inline uint16_t usart0__compute_ubrr(void)
 *
 * \brief Compute UBRR register value.
 *
 * \return UBRR value.
 ******************************************************************************/

static inline
uint16_t
usart0__compute_ubrr
(
    void
){
    uint16_t ubrr = 0;

    switch (configuration.mode)
    {
        case USART__MODE__ASYNCHRONOUS:
        {
            if (!double_speed_is_set)
            {
                ubrr = F_CPU / (16 * configuration.baudrate) - 1;
            }
            else
            {
                ubrr = F_CPU / (8 * configuration.baudrate) - 1;
            }
        }
        break;

        case USART__MODE__SYNCHRONOUS:
        {
            ubrr = F_CPU / (2 * configuration.baudrate) - 1;
        }
        break;

        case USART__MODE__MASTER_SPI:
        break;

        default:
        break;
    }

    return ubrr;
}

/******************************************************************************
 * Interrupt vectors.
 ******************************************************************************/


/**************************************************************************//**
 * \fn ISR(USART_RX_vect)
 *
 * \brief RX interrupt vector.
 ******************************************************************************/

ISR(USART0_RX_vect)
{
    if (NULL != p_rx_complete)
    {
        p_rx_complete();
    }
}

/**************************************************************************//**
 * \fn ISR(USART_TX_vect)
 *
 * \brief TX interrupt vector.
 ******************************************************************************/

ISR(USART0_TX_vect)
{
    if (NULL != p_tx_complete)
    {
        p_tx_complete();
    }
}

/**************************************************************************//**
 * \fn ISR(USART_UDRE_vect)
 *
 * \brief Data register empty interrupt vector.
 ******************************************************************************/

ISR(USART0_UDRE_vect)
{
    if (NULL != p_data_register_empty)
    {
        p_data_register_empty();
    }
}