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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 12 | jlesech | 1 | /**************************************************************************//** |
| 2 | * \brief USART0 library |
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| 3 | * \author Copyright (C) 2011 Julien Le Sech - www.idreammicro.com |
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| 4 | * \version 1.0 |
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| 5 | * \date 20090426 |
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| 6 | * |
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| 7 | * This file is part of the iDreamMicro library. |
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| 8 | * |
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| 9 | * This library is free software: you can redistribute it and/or modify it under |
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| 10 | * the terms of the GNU Lesser General Public License as published by the Free |
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| 11 | * Software Foundation, either version 3 of the License, or (at your option) any |
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| 12 | * later version. |
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| 13 | * |
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| 14 | * This library is distributed in the hope that it will be useful, but WITHOUT |
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| 15 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS |
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| 16 | * FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more |
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| 17 | * details. |
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| 18 | * |
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| 19 | * You should have received a copy of the GNU Lesser General Public License |
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| 20 | * along with this program. If not, see http://www.gnu.org/licenses/ |
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| 21 | ******************************************************************************/ |
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| 22 | |||
| 23 | /**************************************************************************//** |
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| 24 | * \file usart0_m328.c |
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| 25 | ******************************************************************************/ |
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| 26 | |||
| 27 | /****************************************************************************** |
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| 28 | * Header file inclusions. |
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| 29 | ******************************************************************************/ |
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| 30 | |||
| 31 | #include "../usart0.h" |
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| 38 | jlesech | 32 | #include "../include/usart_prv.h" |
| 12 | jlesech | 33 | |
| 34 | #include <usart/usart.h> |
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| 35 | |||
| 36 | #include <useful/bits.h> |
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| 37 | |||
| 38 | #include <avr/interrupt.h> |
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| 39 | #include <avr/io.h> |
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| 40 | |||
| 41 | #include <assert.h> |
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| 23 | jlesech | 42 | #include <stdbool.h> |
| 12 | jlesech | 43 | #include <stdint.h> |
| 44 | #include <stdlib.h> |
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| 45 | |||
| 46 | /****************************************************************************** |
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| 47 | * Private variable declarations. |
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| 48 | ******************************************************************************/ |
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| 49 | |||
| 50 | static usart__rx_complete_callback_t* p_rx_complete = NULL; |
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| 51 | static usart__tx_complete_callback_t* p_tx_complete = NULL; |
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| 52 | static usart__data_register_empty_callback_t* p_data_register_empty = NULL; |
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| 53 | |||
| 54 | static usart__configuration_t configuration = |
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| 55 | { |
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| 56 | .mode = USART__MODE__ASYNCHRONOUS, |
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| 57 | .baudrate = USART__BAUDRATE__9600, |
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| 58 | .data_size = USART__DATA_SIZE__8_BITS, |
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| 59 | .stop_size = USART__STOP_SIZE__1_BIT, |
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| 60 | .parity = USART__PARITY__DISABLED |
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| 61 | }; |
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| 62 | |||
| 63 | static bool double_speed_is_set = false; |
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| 64 | |||
| 65 | /****************************************************************************** |
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| 66 | * Private function prototypes. |
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| 67 | ******************************************************************************/ |
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| 68 | |||
| 69 | /**************************************************************************//** |
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| 70 | * \fn static inline uint16_t usart0__compute_ubrr(void) |
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| 71 | * |
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| 72 | * \brief Compute UBRR register value. |
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| 73 | * |
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| 74 | * \return UBRR value. |
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| 75 | ******************************************************************************/ |
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| 76 | static inline |
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| 77 | uint16_t |
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| 78 | usart0__compute_ubrr |
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| 79 | ( |
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| 80 | void |
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| 81 | ); |
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| 82 | |||
| 83 | /****************************************************************************** |
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| 84 | * Public function definitions. |
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| 85 | ******************************************************************************/ |
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| 86 | |||
| 87 | /**************************************************************************//** |
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| 88 | * \fn void usart0__initialize(usart__configuration_t* p_configuration) |
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| 89 | * |
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| 90 | * \brief Initialize USART0. |
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| 91 | * |
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| 92 | * \param[in] p_configuration USART configuration. If null, default settings |
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| 93 | * will be used. |
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| 94 | * |
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| 95 | * Default settings: |
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| 96 | * - baudrate = 9600 bps; |
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| 97 | * - 8 data bits; |
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| 98 | * - 1 stop bit; |
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| 99 | * - no parity. |
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| 100 | ******************************************************************************/ |
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| 101 | void |
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| 102 | usart0__initialize |
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| 103 | ( |
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| 41 | jlesech | 104 | const usart__configuration_t* p_configuration |
| 12 | jlesech | 105 | ){ |
| 106 | // If p_configuration is not null, use it! |
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| 107 | if (NULL != p_configuration) |
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| 108 | { |
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| 109 | configuration = *p_configuration; |
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| 110 | } |
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| 111 | |||
| 112 | // Set mode. |
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| 113 | usart0__set_mode(configuration.mode); |
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| 114 | |||
| 115 | // Set baud rate. |
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| 116 | usart0__set_baudrate(configuration.baudrate); |
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| 117 | usart0__set_double_speed(false); |
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| 118 | |||
| 119 | // Configure settings. |
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| 120 | usart0__set_data_size(configuration.data_size); |
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| 121 | usart0__set_stop_size(configuration.stop_size); |
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| 122 | usart0__set_parity(configuration.parity); |
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| 123 | } |
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| 124 | |||
| 125 | /**************************************************************************//** |
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| 126 | * \fn void usart0__set_baudrate(usart__baudrate_t baudrate) |
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| 127 | * |
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| 128 | * \brief Set USART0 baudrate. |
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| 129 | * |
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| 130 | * \param baudrate baudrate to set (in bauds per second) |
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| 131 | ******************************************************************************/ |
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| 132 | void |
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| 133 | usart0__set_baudrate |
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| 134 | ( |
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| 135 | usart__baudrate_t baudrate |
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| 136 | ){ |
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| 137 | configuration.baudrate = baudrate; |
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| 138 | |||
| 139 | uint16_t ubrr = usart0__compute_ubrr(); |
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| 140 | UBRR0H = (uint8_t)(ubrr >> 8); |
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| 141 | UBRR0L = (uint8_t)ubrr; |
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| 142 | } |
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| 143 | |||
| 144 | /**************************************************************************//** |
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| 145 | * \fn void usart0__set_mode(usart__mode_t usart_mode) |
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| 146 | * |
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| 147 | * \brief Set USART0 mode. |
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| 148 | * |
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| 149 | * \param usart_mode Mode to set. |
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| 150 | ******************************************************************************/ |
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| 151 | void |
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| 152 | usart0__set_mode |
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| 153 | ( |
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| 154 | usart__mode_t usart_mode |
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| 155 | ){ |
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| 156 | // Check the preconditions. |
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| 157 | assert(USART__MODE__INVALID > usart_mode); |
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| 158 | |||
| 159 | configuration.mode = usart_mode; |
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| 160 | |||
| 161 | switch (usart_mode) |
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| 162 | { |
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| 163 | case USART__MODE__ASYNCHRONOUS: |
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| 164 | { |
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| 165 | BIT__RST(UCSR0C, UMSEL01); |
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| 166 | BIT__RST(UCSR0C, UMSEL00); |
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| 167 | } |
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| 168 | break; |
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| 169 | |||
| 170 | case USART__MODE__SYNCHRONOUS: |
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| 171 | { |
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| 172 | BIT__RST(UCSR0C, UMSEL01); |
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| 173 | BIT__SET(UCSR0C, UMSEL00); |
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| 174 | } |
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| 175 | break; |
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| 176 | |||
| 177 | case USART__MODE__MASTER_SPI: |
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| 178 | { |
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| 179 | BIT__SET(UCSR0C, UMSEL01); |
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| 180 | BIT__SET(UCSR0C, UMSEL00); |
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| 181 | } |
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| 182 | break; |
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| 183 | |||
| 184 | case USART__MODE__INVALID: |
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| 185 | default: |
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| 186 | break; |
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| 187 | } |
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| 188 | } |
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| 189 | |||
| 190 | /**************************************************************************//** |
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| 191 | * \fn void usart0__set_data_size(usart__data_sizet data_size) |
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| 192 | * |
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| 193 | * \brief Set USART0 data size. |
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| 194 | * |
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| 195 | * \param data_size data size (in bits) |
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| 196 | ******************************************************************************/ |
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| 197 | void |
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| 198 | usart0__set_data_size |
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| 199 | ( |
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| 200 | usart__data_size_t data_size |
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| 201 | ){ |
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| 202 | configuration.data_size = data_size; |
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| 203 | |||
| 204 | switch (data_size) |
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| 205 | { |
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| 206 | case USART__DATA_SIZE__5_BITS: |
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| 207 | { |
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| 208 | BIT__RST(UCSR0B, UCSZ02); |
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| 209 | BIT__RST(UCSR0C, UCSZ01); |
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| 210 | BIT__RST(UCSR0C, UCSZ00); |
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| 211 | } |
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| 212 | break; |
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| 213 | |||
| 214 | case USART__DATA_SIZE__6_BITS: |
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| 215 | { |
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| 216 | BIT__RST(UCSR0B, UCSZ02); |
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| 217 | BIT__RST(UCSR0C, UCSZ01); |
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| 218 | BIT__SET(UCSR0C, UCSZ00); |
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| 219 | } |
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| 220 | break; |
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| 221 | |||
| 222 | case USART__DATA_SIZE__7_BITS: |
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| 223 | { |
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| 224 | BIT__RST(UCSR0B, UCSZ02); |
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| 225 | BIT__SET(UCSR0C, UCSZ01); |
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| 226 | BIT__RST(UCSR0C, UCSZ00); |
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| 227 | } |
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| 228 | break; |
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| 229 | |||
| 230 | case USART__DATA_SIZE__8_BITS: |
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| 231 | { |
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| 232 | BIT__RST(UCSR0B, UCSZ02); |
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| 233 | BIT__SET(UCSR0C, UCSZ01); |
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| 234 | BIT__SET(UCSR0C, UCSZ00); |
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| 235 | } |
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| 236 | break; |
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| 237 | |||
| 238 | case USART__DATA_SIZE__9_BITS: |
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| 239 | { |
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| 240 | BIT__SET(UCSR0B, UCSZ02); |
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| 241 | BIT__SET(UCSR0C, UCSZ01); |
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| 242 | BIT__SET(UCSR0C, UCSZ00); |
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| 243 | } |
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| 244 | break; |
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| 245 | |||
| 246 | default: |
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| 247 | break; |
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| 248 | } |
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| 249 | } |
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| 250 | |||
| 251 | /**************************************************************************//** |
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| 252 | * \fn void usart0__set_stop_size(usart__stop_size_t stop_size) |
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| 253 | * |
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| 254 | * \brief Set USART0 stop size. |
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| 255 | * |
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| 256 | * \param stop_size stop size (in bits) |
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| 257 | ******************************************************************************/ |
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| 258 | void |
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| 259 | usart0__set_stop_size |
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| 260 | ( |
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| 261 | usart__stop_size_t stop_size |
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| 262 | ){ |
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| 263 | configuration.stop_size = stop_size; |
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| 264 | |||
| 265 | if (USART__STOP_SIZE__1_BIT == stop_size) |
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| 266 | { |
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| 267 | BIT__RST(UCSR0C, USBS0); |
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| 268 | } |
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| 269 | else |
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| 270 | { |
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| 271 | BIT__SET(UCSR0C, USBS0); |
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| 272 | } |
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| 273 | } |
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| 274 | |||
| 275 | /**************************************************************************//** |
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| 276 | * \fn void usart0__set_parity(usart__parity_t parity) |
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| 277 | * |
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| 278 | * \brief Set USART0 parity. |
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| 279 | * |
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| 280 | * \param parity parity to set |
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| 281 | ******************************************************************************/ |
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| 282 | void |
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| 283 | usart0__set_parity |
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| 284 | ( |
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| 285 | usart__parity_t parity |
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| 286 | ){ |
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| 287 | configuration.parity = parity; |
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| 288 | |||
| 289 | switch (parity) |
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| 290 | { |
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| 291 | case USART__PARITY__DISABLED: |
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| 292 | { |
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| 293 | BIT__RST(UCSR0C, UPM01); |
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| 294 | BIT__RST(UCSR0C, UPM00); |
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| 295 | } |
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| 296 | break; |
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| 297 | |||
| 298 | case USART__PARITY__EVEN: |
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| 299 | { |
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| 300 | BIT__SET(UCSR0C, UPM01); |
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| 301 | BIT__RST(UCSR0C, UPM00); |
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| 302 | } |
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| 303 | break; |
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| 304 | |||
| 305 | case USART__PARITY__ODD: |
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| 306 | { |
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| 307 | BIT__SET(UCSR0C, UPM01); |
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| 308 | BIT__SET(UCSR0C, UPM00); |
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| 309 | } |
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| 310 | break; |
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| 311 | |||
| 312 | default: |
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| 313 | break; |
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| 314 | } |
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| 315 | } |
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| 316 | |||
| 317 | /**************************************************************************//** |
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| 318 | * \fn void usart0__set_double_speed(bool double_speed) |
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| 319 | * |
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| 320 | * \brief Set double speed. |
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| 321 | * |
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| 322 | * \param double_speed True to set double speed, false otherwise. |
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| 323 | ******************************************************************************/ |
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| 324 | void |
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| 325 | usart0__set_double_speed |
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| 326 | ( |
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| 327 | bool double_speed |
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| 328 | ){ |
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| 329 | double_speed_is_set = double_speed; |
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| 330 | |||
| 331 | if (double_speed_is_set) |
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| 332 | { |
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| 333 | BIT__SET(UCSR0A, U2X0); |
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| 334 | } |
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| 335 | else |
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| 336 | { |
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| 337 | BIT__RST(UCSR0A, U2X0); |
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| 338 | } |
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| 339 | } |
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| 340 | |||
| 341 | /**************************************************************************//** |
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| 342 | * \fn void usart0__enable_receiver(void) |
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| 343 | * |
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| 344 | * \brief Enable USART 0 receiver. |
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| 345 | ******************************************************************************/ |
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| 346 | void |
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| 347 | usart0__enable_receiver |
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| 348 | ( |
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| 349 | void |
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| 350 | ){ |
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| 351 | BIT__SET(UCSR0B, RXEN0); |
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| 352 | } |
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| 353 | |||
| 354 | /**************************************************************************//** |
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| 355 | * \fn void usart0__disable_receiver(void) |
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| 356 | * |
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| 357 | * \brief Disable USART 0 receiver. |
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| 358 | ******************************************************************************/ |
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| 359 | void |
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| 360 | usart0__disable_receiver |
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| 361 | ( |
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| 362 | void |
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| 363 | ){ |
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| 364 | BIT__RST(UCSR0B, RXEN0); |
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| 365 | } |
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| 366 | |||
| 367 | /**************************************************************************//** |
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| 368 | * \fn void usart0__enable_transmitter(void) |
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| 369 | * |
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| 370 | * \brief Enable USART 0 transmitter. |
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| 371 | ******************************************************************************/ |
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| 372 | void |
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| 373 | usart0__enable_transmitter |
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| 374 | ( |
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| 375 | void |
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| 376 | ){ |
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| 377 | BIT__SET(UCSR0B, TXEN0); |
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| 378 | } |
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| 379 | |||
| 380 | /**************************************************************************//** |
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| 381 | * \fn void usart0__disable_transmitter(void) |
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| 382 | * |
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| 383 | * \brief Disable USART 0 transmitter. |
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| 384 | ******************************************************************************/ |
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| 385 | void |
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| 386 | usart0__disable_transmitter |
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| 387 | ( |
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| 388 | void |
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| 389 | ){ |
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| 390 | BIT__RST(UCSR0B, TXEN0); |
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| 391 | } |
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| 392 | |||
| 393 | /**************************************************************************//** |
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| 394 | * \fn uint8_t usart0__receive_byte(void) |
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| 395 | * |
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| 396 | * \brief Receive a byte on USART0. |
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| 397 | * |
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| 398 | * \return received byte |
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| 399 | ******************************************************************************/ |
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| 400 | uint16_t |
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| 401 | usart0__receive_byte |
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| 402 | ( |
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| 403 | void |
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| 404 | ){ |
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| 405 | // Wait for data to be received. |
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| 406 | while (!(UCSR0A & (1 << RXC0))); |
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| 407 | |||
| 408 | // Get received data. |
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| 409 | uint16_t received_byte = UDR0; |
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| 410 | |||
| 411 | if (USART__DATA_SIZE__9_BITS == configuration.data_size) |
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| 412 | { |
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| 413 | // If 9-bit data size, get 9th bit. |
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| 414 | uint8_t resh = UCSR0B; |
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| 415 | resh = (resh >> 1) & 0x01; |
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| 416 | received_byte = (resh << 8) | received_byte; |
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| 417 | } |
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| 418 | |||
| 419 | // Return received data from buffer. |
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| 420 | return received_byte; |
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| 421 | } |
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| 422 | |||
| 423 | /**************************************************************************//** |
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| 424 | * \fn usart0__transmit_byte(uint8_t byte_to_transmit) |
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| 425 | * |
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| 426 | * \brief Transmit a byte on USART0. |
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| 427 | * |
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| 428 | * \param byte_to_transmit byte to transmit |
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| 429 | ******************************************************************************/ |
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| 430 | void |
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| 431 | usart0__transmit_byte |
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| 432 | ( |
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| 433 | uint16_t byte_to_transmit |
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| 434 | ){ |
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| 435 | // Wait for empty transmit buffer. |
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| 436 | while (!(UCSR0A & (1 << UDRE0))); |
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| 437 | |||
| 438 | if (USART__DATA_SIZE__9_BITS == configuration.data_size) |
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| 439 | { |
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| 440 | // If 9-bit data size, copy 9th bit to TXB80. |
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| 441 | UCSR0B &= ~(1 << TXB80); |
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| 442 | if (byte_to_transmit & 0x0100) |
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| 443 | { |
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| 444 | UCSR0B |= (1 << TXB80); |
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| 445 | } |
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| 446 | } |
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| 447 | |||
| 448 | // Put data into transmit buffer, sends the data. |
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| 449 | UDR0 = byte_to_transmit; |
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| 450 | } |
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| 451 | |||
| 452 | /**************************************************************************//** |
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| 453 | * \fn void usart0__flush(void) |
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| 454 | * |
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| 455 | * \brief Flush USART0 receiver buffer. |
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| 456 | ******************************************************************************/ |
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| 457 | void |
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| 458 | usart0__flush |
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| 459 | ( |
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| 460 | void |
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| 461 | ){ |
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| 462 | uint8_t dummy = 0; |
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| 463 | while (UCSR0A & (1 << RXC0)) |
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| 464 | { |
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| 465 | dummy = UDR0; |
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| 466 | } |
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| 467 | } |
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| 468 | |||
| 469 | /**************************************************************************//** |
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| 470 | * \fn void usart0__enable_rx_complete_interrupt(void) |
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| 471 | * |
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| 472 | * \brief Enable USART 0 receive complete interrupt. |
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| 473 | ******************************************************************************/ |
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| 474 | void |
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| 475 | usart0__enable_rx_complete_interrupt |
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| 476 | ( |
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| 477 | void |
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| 478 | ){ |
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| 479 | BIT__SET(UCSR0B, RXCIE0); |
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| 480 | sei(); |
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| 481 | } |
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| 482 | |||
| 483 | /**************************************************************************//** |
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| 484 | * \fn void usart0__disable_rx_complete_interrupt(void) |
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| 485 | * |
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| 486 | * \brief Disable USART 0 receive complete interrupt. |
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| 487 | ******************************************************************************/ |
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| 488 | void |
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| 489 | usart0__disable_rx_complete_interrupt |
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| 490 | ( |
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| 491 | void |
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| 492 | ){ |
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| 493 | BIT__RST(UCSR0B, RXCIE0); |
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| 494 | sei(); |
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| 495 | } |
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| 496 | |||
| 497 | /**************************************************************************//** |
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| 498 | * \fn void usart0__set_rx_complete_callback( |
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| 499 | * const usart__rx_complete_callback_t* p_callback) |
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| 500 | * |
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| 501 | * \brief Set a callback to call when receive byte complete interrupt is |
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| 502 | * generated. |
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| 503 | * |
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| 504 | * \param[in] p_callback Callback to set. |
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| 505 | ******************************************************************************/ |
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| 506 | void |
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| 507 | usart0__set_rx_complete_callback |
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| 508 | ( |
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| 509 | const usart__rx_complete_callback_t* p_callback |
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| 510 | ){ |
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| 511 | // Check the preconditions. |
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| 512 | assert(NULL != p_callback); |
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| 513 | |||
| 514 | p_rx_complete = p_callback; |
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| 515 | } |
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| 516 | |||
| 517 | /**************************************************************************//** |
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| 518 | * \fn void usart0__enable_tx_complete_interrupt(void) |
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| 519 | * |
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| 520 | * \brief Enable interrupt when TX complete. |
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| 521 | ******************************************************************************/ |
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| 522 | void |
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| 523 | usart0__enable_tx_complete_interrupt |
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| 524 | ( |
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| 525 | void |
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| 526 | ){ |
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| 527 | BIT__SET(UCSR0B, TXCIE0); |
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| 528 | sei(); |
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| 529 | } |
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| 530 | |||
| 531 | /**************************************************************************//** |
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| 532 | * \fn void usart0__disable_tx_complete_interrupt(void) |
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| 533 | * |
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| 534 | * \brief Disable interrupt when TX complete. |
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| 535 | ******************************************************************************/ |
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| 536 | void |
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| 537 | usart0__disable_tx_complete_interrupt |
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| 538 | ( |
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| 539 | void |
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| 540 | ){ |
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| 541 | BIT__RST(UCSR0B, TXCIE0); |
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| 542 | sei(); |
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| 543 | } |
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| 544 | |||
| 545 | /**************************************************************************//** |
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| 546 | * \fn void usart0__set_tx_complete_callback( |
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| 547 | * const usart__tx_complete_callback_t* p_callback) |
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| 548 | * |
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| 549 | * \brief Set a callback to call when TX is complete. |
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| 550 | * |
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| 551 | * \param[in] p_callback Function to call. |
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| 552 | ******************************************************************************/ |
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| 553 | void |
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| 554 | usart0__set_tx_complete_callback |
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| 555 | ( |
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| 556 | const usart__tx_complete_callback_t* p_callback |
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| 557 | ){ |
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| 558 | // Check the preconditions. |
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| 559 | assert(NULL != p_callback); |
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| 560 | |||
| 561 | p_tx_complete = p_callback; |
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| 562 | } |
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| 563 | |||
| 564 | /**************************************************************************//** |
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| 565 | * \fn void usart0__enable_data_register_empty_interrupt() |
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| 566 | * |
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| 567 | * \brief Enable interrupt when data register is empty. |
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| 568 | ******************************************************************************/ |
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| 569 | void |
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| 570 | usart0__enable_data_register_empty_interrupt |
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| 571 | ( |
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| 572 | void |
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| 573 | ){ |
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| 574 | BIT__SET(UCSR0B, UDRIE0); |
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| 575 | sei(); |
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| 576 | } |
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| 577 | |||
| 578 | /**************************************************************************//** |
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| 579 | * \fn void usart0__disable_data_register_empty_interrupt() |
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| 580 | * |
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| 581 | * \brief Disable interrupt when data register is empty. |
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| 582 | ******************************************************************************/ |
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| 583 | void |
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| 584 | usart0__disable_data_register_empty_interrupt |
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| 585 | ( |
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| 586 | void |
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| 587 | ){ |
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| 588 | BIT__RST(UCSR0B, UDRIE0); |
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| 589 | sei(); |
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| 590 | } |
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| 591 | |||
| 592 | /**************************************************************************//** |
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| 593 | * \fn void usart0__set_data_register_empty_callback( |
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| 594 | * const usart__data_register_empty_callback_t* p_callback) |
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| 595 | * |
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| 596 | * \brief Set a callback to call when data register is empty. |
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| 597 | * |
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| 598 | * \param[in] p_callback Function to call. |
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| 599 | ******************************************************************************/ |
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| 600 | void |
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| 601 | usart0__set_data_register_empty_callback |
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| 602 | ( |
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| 603 | const usart__data_register_empty_callback_t* p_callback |
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| 604 | ){ |
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| 605 | // Check the preconditions. |
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| 606 | assert(NULL != p_callback); |
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| 607 | |||
| 608 | p_data_register_empty = p_callback; |
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| 609 | } |
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| 610 | |||
| 611 | /****************************************************************************** |
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| 612 | * Private function definitions. |
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| 613 | ******************************************************************************/ |
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| 614 | |||
| 615 | /**************************************************************************//** |
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| 616 | * \fn static inline uint16_t usart0__compute_ubrr(void) |
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| 617 | * |
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| 618 | * \brief Compute UBRR register value. |
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| 619 | * |
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| 620 | * \return UBRR value. |
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| 621 | ******************************************************************************/ |
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| 622 | static inline |
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| 623 | uint16_t |
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| 624 | usart0__compute_ubrr |
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| 625 | ( |
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| 626 | void |
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| 627 | ){ |
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| 628 | uint16_t ubrr = 0; |
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| 629 | |||
| 630 | switch (configuration.mode) |
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| 631 | { |
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| 632 | case USART__MODE__ASYNCHRONOUS: |
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| 633 | { |
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| 634 | if (!double_speed_is_set) |
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| 635 | { |
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| 38 | jlesech | 636 | ubrr = F_CPU / (16 * usart__baudrate_values[configuration.baudrate]) - 1; |
| 12 | jlesech | 637 | } |
| 638 | else |
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| 639 | { |
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| 38 | jlesech | 640 | ubrr = F_CPU / (8 * usart__baudrate_values[configuration.baudrate]) - 1; |
| 12 | jlesech | 641 | } |
| 642 | } |
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| 643 | break; |
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| 644 | |||
| 645 | case USART__MODE__SYNCHRONOUS: |
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| 646 | { |
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| 38 | jlesech | 647 | ubrr = F_CPU / (2 * usart__baudrate_values[configuration.baudrate]) - 1; |
| 12 | jlesech | 648 | } |
| 649 | break; |
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| 650 | |||
| 651 | case USART__MODE__MASTER_SPI: |
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| 652 | break; |
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| 653 | |||
| 654 | default: |
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| 655 | break; |
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| 656 | } |
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| 657 | |||
| 658 | return ubrr; |
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| 659 | } |
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| 660 | |||
| 661 | /****************************************************************************** |
||
| 662 | * Interrupt vectors. |
||
| 663 | ******************************************************************************/ |
||
| 664 | |||
| 665 | /**************************************************************************//** |
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| 666 | * \fn ISR(USART_RX_vect) |
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| 667 | * |
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| 668 | * \brief RX interrupt vector. |
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| 669 | ******************************************************************************/ |
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| 670 | ISR(USART_RX_vect) |
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| 671 | { |
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| 672 | if (NULL != p_rx_complete) |
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| 673 | { |
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| 674 | p_rx_complete(); |
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| 675 | } |
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| 676 | } |
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| 677 | |||
| 678 | /**************************************************************************//** |
||
| 679 | * \fn ISR(USART_TX_vect) |
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| 680 | * |
||
| 681 | * \brief TX interrupt vector. |
||
| 682 | ******************************************************************************/ |
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| 683 | ISR(USART_TX_vect) |
||
| 684 | { |
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| 685 | if (NULL != p_tx_complete) |
||
| 686 | { |
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| 687 | p_tx_complete(); |
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| 688 | } |
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| 689 | } |
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| 690 | |||
| 691 | /**************************************************************************//** |
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| 692 | * \fn ISR(USART_UDRE_vect) |
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| 693 | * |
||
| 694 | * \brief Data register empty interrupt vector. |
||
| 695 | ******************************************************************************/ |
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| 696 | ISR(USART_UDRE_vect) |
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| 697 | { |
||
| 698 | if (NULL != p_data_register_empty) |
||
| 699 | { |
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| 700 | p_data_register_empty(); |
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| 701 | } |
||
| 702 | } |