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12 | jlesech | 1 | /**************************************************************************//** |
2 | * \brief USART0 library |
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3 | * \author Copyright (C) 2011 Julien Le Sech - www.idreammicro.com |
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4 | * \version 1.0 |
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5 | * \date 20090426 |
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6 | * |
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7 | * This file is part of the iDreamMicro library. |
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8 | * |
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9 | * This library is free software: you can redistribute it and/or modify it under |
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10 | * the terms of the GNU Lesser General Public License as published by the Free |
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11 | * Software Foundation, either version 3 of the License, or (at your option) any |
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12 | * later version. |
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13 | * |
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14 | * This library is distributed in the hope that it will be useful, but WITHOUT |
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15 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS |
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16 | * FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more |
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17 | * details. |
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18 | * |
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19 | * You should have received a copy of the GNU Lesser General Public License |
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20 | * along with this program. If not, see http://www.gnu.org/licenses/ |
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21 | ******************************************************************************/ |
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22 | |||
23 | /**************************************************************************//** |
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24 | * \file usart0_m128.c |
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25 | ******************************************************************************/ |
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26 | |||
27 | /****************************************************************************** |
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28 | * Header file inclusions. |
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29 | ******************************************************************************/ |
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30 | |||
31 | #include "../usart0.h" |
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32 | |||
33 | #include <usart/usart.h> |
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34 | |||
35 | #include <useful/bits.h> |
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36 | #include <useful/bool.h> |
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37 | |||
38 | #include <avr/interrupt.h> |
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39 | #include <avr/io.h> |
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40 | |||
41 | #include <assert.h> |
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42 | #include <stdint.h> |
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43 | #include <stdlib.h> |
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44 | |||
45 | /****************************************************************************** |
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46 | * Private variable declarations. |
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47 | ******************************************************************************/ |
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48 | |||
49 | static usart__rx_complete_callback_t* p_rx_complete = NULL; |
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50 | static usart__tx_complete_callback_t* p_tx_complete = NULL; |
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51 | static usart__data_register_empty_callback_t* p_data_register_empty = NULL; |
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52 | |||
53 | static usart__configuration_t configuration = |
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54 | { |
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55 | .mode = USART__MODE__ASYNCHRONOUS, |
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56 | .baudrate = USART__BAUDRATE__9600, |
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57 | .data_size = USART__DATA_SIZE__8_BITS, |
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58 | .stop_size = USART__STOP_SIZE__1_BIT, |
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59 | .parity = USART__PARITY__DISABLED |
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60 | }; |
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61 | |||
62 | static bool double_speed_is_set = false; |
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63 | |||
64 | /****************************************************************************** |
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65 | * Private function prototypes. |
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66 | ******************************************************************************/ |
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67 | |||
68 | /**************************************************************************//** |
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69 | * |
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70 | ******************************************************************************/ |
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71 | static inline |
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72 | uint16_t |
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73 | usart0__compute_ubrr |
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74 | ( |
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75 | void |
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76 | ); |
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77 | |||
78 | /****************************************************************************** |
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79 | * Public function definitions. |
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80 | ******************************************************************************/ |
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81 | |||
82 | /**************************************************************************//** |
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83 | * \fn void usart0__initialize(usart__configuration_t* p_configuration) |
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84 | * |
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85 | * \brief Initialize USART0. |
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86 | * |
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87 | * \param[in] p_configuration USART configuration. If null, default settings |
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88 | * will be used. |
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89 | * |
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90 | * Default settings: |
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91 | * - baudrate = 9600 bps; |
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92 | * - 8 data bits; |
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93 | * - 1 stop bit; |
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94 | * - no parity. |
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95 | ******************************************************************************/ |
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96 | void |
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97 | usart0__initialize |
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98 | ( |
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99 | usart__configuration_t* p_configuration |
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100 | ){ |
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101 | // If p_configuration is not null, use it! |
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102 | if (NULL != p_configuration) |
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103 | { |
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104 | configuration = *p_configuration; |
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105 | } |
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106 | |||
107 | // Set mode. |
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108 | usart0__set_mode(configuration.mode); |
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109 | |||
110 | // Set baud rate. |
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111 | usart0__set_baudrate(configuration.baudrate); |
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112 | usart0__set_double_speed(false); |
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113 | |||
114 | // Configure settings. |
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115 | usart0__set_data_size(configuration.data_size); |
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116 | usart0__set_stop_size(configuration.stop_size); |
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117 | usart0__set_parity(configuration.parity); |
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118 | } |
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119 | |||
120 | /**************************************************************************//** |
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121 | * \fn void usart0__set_baudrate(usart__baudrate_t baudrate) |
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122 | * |
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123 | * \brief Set USART0 baudrate. |
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124 | * |
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125 | * \param baudrate baudrate to set (in bauds per second) |
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126 | ******************************************************************************/ |
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127 | void |
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128 | usart0__set_baudrate |
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129 | ( |
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130 | usart__baudrate_t baudrate |
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131 | ){ |
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132 | configuration.baudrate = baudrate; |
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133 | |||
134 | uint16_t ubrr = usart0__compute_ubrr(); |
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135 | UBRR0H = (uint8_t)(ubrr >> 8); |
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136 | UBRR0L = (uint8_t)ubrr; |
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137 | } |
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138 | |||
139 | /**************************************************************************//** |
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140 | * \fn void usart0__set_mode(usart__mode_t usart_mode) |
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141 | * |
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142 | * \brief Set USART0 mode. |
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143 | * |
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144 | * \param usart_mode Mode to set. |
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145 | ******************************************************************************/ |
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146 | void |
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147 | usart0__set_mode |
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148 | ( |
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149 | usart__mode_t usart_mode |
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150 | ){ |
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151 | // Check the preconditions. |
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152 | assert(USART__MODE__INVALID > usart_mode); |
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153 | |||
154 | configuration.mode = usart_mode; |
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155 | |||
156 | switch (usart_mode) |
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157 | { |
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158 | case USART__MODE__ASYNCHRONOUS: |
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159 | { |
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15 | jlesech | 160 | BIT__RST(UCSR0C, UMSEL0); |
12 | jlesech | 161 | } |
162 | break; |
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163 | |||
164 | case USART__MODE__SYNCHRONOUS: |
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165 | { |
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166 | BIT__SET(UCSR0C, UMSEL0); |
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167 | } |
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168 | break; |
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169 | |||
170 | case USART__MODE__MASTER_SPI: |
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171 | case USART__MODE__INVALID: |
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172 | default: |
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173 | break; |
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174 | } |
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175 | } |
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176 | |||
177 | /**************************************************************************//** |
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178 | * \fn void usart0__set_data_size(usart__data_sizet data_size) |
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179 | * |
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180 | * \brief Set USART0 data size. |
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181 | * |
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182 | * \param data_size data size (in bits) |
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183 | ******************************************************************************/ |
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184 | void |
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185 | usart0__set_data_size |
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186 | ( |
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187 | usart__data_size_t data_size |
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188 | ){ |
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189 | configuration.data_size = data_size; |
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190 | |||
191 | switch (data_size) |
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192 | { |
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193 | case USART__DATA_SIZE__5_BITS: |
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194 | { |
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15 | jlesech | 195 | BIT__RST(UCSR0B, UCSZ02); |
196 | BIT__RST(UCSR0C, UCSZ01); |
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197 | BIT__RST(UCSR0C, UCSZ00); |
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12 | jlesech | 198 | } |
199 | break; |
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200 | |||
201 | case USART__DATA_SIZE__6_BITS: |
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202 | { |
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15 | jlesech | 203 | BIT__RST(UCSR0B, UCSZ02); |
204 | BIT__RST(UCSR0C, UCSZ01); |
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12 | jlesech | 205 | BIT__SET(UCSR0C, UCSZ00); |
206 | } |
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207 | break; |
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208 | |||
209 | case USART__DATA_SIZE__7_BITS: |
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210 | { |
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15 | jlesech | 211 | BIT__RST(UCSR0B, UCSZ02); |
12 | jlesech | 212 | BIT__SET(UCSR0C, UCSZ01); |
15 | jlesech | 213 | BIT__RST(UCSR0C, UCSZ00); |
12 | jlesech | 214 | } |
215 | break; |
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216 | |||
217 | case USART__DATA_SIZE__8_BITS: |
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218 | { |
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15 | jlesech | 219 | BIT__RST(UCSR0B, UCSZ02); |
12 | jlesech | 220 | BIT__SET(UCSR0C, UCSZ01); |
221 | BIT__SET(UCSR0C, UCSZ00); |
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222 | } |
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223 | break; |
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224 | |||
225 | case USART__DATA_SIZE__9_BITS: |
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226 | { |
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227 | BIT__SET(UCSR0B, UCSZ02); |
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228 | BIT__SET(UCSR0C, UCSZ01); |
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229 | BIT__SET(UCSR0C, UCSZ00); |
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230 | } |
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231 | break; |
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232 | |||
233 | default: |
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234 | break; |
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235 | } |
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236 | } |
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237 | |||
238 | /**************************************************************************//** |
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239 | * \fn void usart0__set_stop_size(usart__stop_size_t stop_size) |
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240 | * |
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241 | * \brief Set USART0 stop size. |
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242 | * |
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243 | * \param stop_size stop size (in bits) |
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244 | ******************************************************************************/ |
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245 | void |
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246 | usart0__set_stop_size |
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247 | ( |
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248 | usart__stop_size_t stop_size |
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249 | ){ |
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250 | configuration.stop_size = stop_size; |
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251 | |||
252 | if (USART__STOP_SIZE__1_BIT == stop_size) |
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253 | { |
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15 | jlesech | 254 | BIT__RST(UCSR0C, USBS0); |
12 | jlesech | 255 | } |
256 | else |
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257 | { |
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258 | BIT__SET(UCSR0C, USBS0); |
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259 | } |
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260 | } |
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261 | |||
262 | /**************************************************************************//** |
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263 | * \fn void usart0__set_parity(usart__parity_t parity) |
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264 | * |
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265 | * \brief Set USART0 parity. |
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266 | * |
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267 | * \param parity parity to set |
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268 | ******************************************************************************/ |
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269 | void |
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270 | usart0__set_parity |
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271 | ( |
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272 | usart__parity_t parity |
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273 | ){ |
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274 | configuration.parity = parity; |
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275 | |||
276 | switch (parity) |
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277 | { |
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278 | case USART__PARITY__DISABLED: |
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279 | { |
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15 | jlesech | 280 | BIT__RST(UCSR0C, UPM01); |
281 | BIT__RST(UCSR0C, UPM00); |
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12 | jlesech | 282 | } |
283 | break; |
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284 | |||
285 | case USART__PARITY__EVEN: |
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286 | { |
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287 | BIT__SET(UCSR0C, UPM01); |
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15 | jlesech | 288 | BIT__RST(UCSR0C, UPM00); |
12 | jlesech | 289 | } |
290 | break; |
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291 | |||
292 | case USART__PARITY__ODD: |
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293 | { |
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294 | BIT__SET(UCSR0C, UPM01); |
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295 | BIT__SET(UCSR0C, UPM00); |
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296 | } |
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297 | break; |
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298 | |||
299 | default: |
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300 | break; |
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301 | } |
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302 | } |
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303 | |||
304 | /**************************************************************************//** |
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305 | * \fn void usart0__set_double_speed(bool double_speed) |
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306 | * |
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307 | * \brief Set double speed. |
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308 | * |
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309 | * \param double_speed True to set double speed, false otherwise. |
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310 | ******************************************************************************/ |
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311 | void |
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312 | usart0__set_double_speed |
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313 | ( |
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314 | bool double_speed |
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315 | ){ |
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316 | double_speed_is_set = double_speed; |
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317 | |||
318 | if (double_speed_is_set) |
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319 | { |
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320 | BIT__SET(UCSR0A, U2X0); |
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321 | } |
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322 | else |
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323 | { |
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15 | jlesech | 324 | BIT__RST(UCSR0A, U2X0); |
12 | jlesech | 325 | } |
326 | } |
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327 | |||
328 | /**************************************************************************//** |
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329 | * \fn void usart0__enable_receiver(void) |
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330 | * |
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331 | * \brief Enable USART 0 receiver. |
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332 | ******************************************************************************/ |
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333 | void |
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334 | usart0__enable_receiver |
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335 | ( |
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336 | void |
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337 | ){ |
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338 | BIT__SET(UCSR0B, RXEN0); |
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339 | } |
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340 | |||
341 | /**************************************************************************//** |
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342 | * \fn void usart0__disable_receiver(void) |
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343 | * |
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344 | * \brief Disable USART 0 receiver. |
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345 | ******************************************************************************/ |
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346 | void |
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347 | usart0__disable_receiver |
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348 | ( |
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349 | void |
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350 | ){ |
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15 | jlesech | 351 | BIT__RST(UCSR0B, RXEN0); |
12 | jlesech | 352 | } |
353 | |||
354 | /**************************************************************************//** |
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355 | * \fn void usart0__enable_transmitter(void) |
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356 | * |
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357 | * \brief Enable USART 0 transmitter. |
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358 | ******************************************************************************/ |
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359 | void |
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360 | usart0__enable_transmitter |
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361 | ( |
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362 | void |
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363 | ){ |
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364 | BIT__SET(UCSR0B, TXEN0); |
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365 | } |
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366 | |||
367 | /**************************************************************************//** |
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368 | * \fn void usart0__disable_transmitter(void) |
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369 | * |
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370 | * \brief Disable USART 0 transmitter. |
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371 | ******************************************************************************/ |
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372 | void |
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373 | usart0__disable_transmitter |
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374 | ( |
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375 | void |
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376 | ){ |
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15 | jlesech | 377 | BIT__RST(UCSR0B, TXEN0); |
12 | jlesech | 378 | } |
379 | |||
380 | /**************************************************************************//** |
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381 | * \fn uint8_t usart0__receive_byte(void) |
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382 | * |
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383 | * \brief Receive a byte on USART0. |
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384 | * |
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385 | * \return received byte |
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386 | ******************************************************************************/ |
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387 | uint16_t |
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388 | usart0__receive_byte |
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389 | ( |
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390 | void |
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391 | ){ |
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392 | // Wait for data to be received. |
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393 | while (!(UCSR0A & (1 << RXC0))); |
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394 | |||
395 | // Get received data. |
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396 | uint16_t received_byte = UDR0; |
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397 | |||
398 | if (USART__DATA_SIZE__9_BITS == configuration.data_size) |
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399 | { |
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400 | // If 9-bit data size, get 9th bit. |
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401 | uint8_t resh = UCSR0B; |
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402 | resh = (resh >> 1) & 0x01; |
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403 | received_byte = (resh << 8) | received_byte; |
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404 | } |
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405 | |||
406 | // Return received data from buffer. |
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407 | return received_byte; |
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408 | } |
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409 | |||
410 | /**************************************************************************//** |
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411 | * \fn usart0__transmit_byte(uint8_t byte_to_transmit) |
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412 | * |
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413 | * \brief Transmit a byte on USART0. |
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414 | * |
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415 | * \param byte_to_transmit byte to transmit |
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416 | ******************************************************************************/ |
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417 | void |
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418 | usart0__transmit_byte |
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419 | ( |
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420 | uint16_t byte_to_transmit |
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421 | ){ |
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422 | // Wait for empty transmit buffer. |
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423 | while (!(UCSR0A & (1 << UDRE0))); |
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424 | |||
425 | if (USART__DATA_SIZE__9_BITS == configuration.data_size) |
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426 | { |
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427 | // If 9-bit data size, copy 9th bit to TXB80. |
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428 | UCSR0B &= ~(1 << TXB80); |
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429 | if (byte_to_transmit & 0x0100) |
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430 | { |
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431 | UCSR0B |= (1 << TXB80); |
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432 | } |
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433 | } |
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434 | |||
435 | // Put data into transmit buffer, sends the data. |
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436 | UDR0 = byte_to_transmit; |
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437 | } |
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438 | |||
439 | /**************************************************************************//** |
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440 | * \fn void usart0__flush(void) |
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441 | * |
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442 | * \brief Flush USART0 receiver buffer. |
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443 | ******************************************************************************/ |
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444 | void |
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445 | usart0__flush |
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446 | ( |
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447 | void |
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448 | ){ |
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449 | uint8_t dummy = 0; |
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450 | while (UCSR0A & (1 << RXC0)) |
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451 | { |
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452 | dummy = UDR0; |
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453 | } |
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454 | } |
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455 | |||
456 | /**************************************************************************//** |
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457 | * \fn void usart0__enable_rx_complete_interrupt(void) |
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458 | * |
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459 | * \brief Enable USART 0 receive complete interrupt. |
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460 | ******************************************************************************/ |
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461 | void |
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462 | usart0__enable_rx_complete_interrupt |
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463 | ( |
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464 | void |
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465 | ){ |
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466 | BIT__SET(UCSR0B, RXCIE0); |
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467 | sei(); |
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468 | } |
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469 | |||
470 | /**************************************************************************//** |
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471 | * \fn void usart0__disable_rx_complete_interrupt(void) |
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472 | * |
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473 | * \brief Disable USART 0 receive complete interrupt. |
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474 | ******************************************************************************/ |
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475 | void |
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476 | usart0__disable_rx_complete_interrupt |
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477 | ( |
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478 | void |
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479 | ){ |
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15 | jlesech | 480 | BIT__RST(UCSR0B, RXCIE0); |
12 | jlesech | 481 | sei(); |
482 | } |
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483 | |||
484 | /**************************************************************************//** |
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485 | * \fn void usart0__set_rx_complete_callback( |
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486 | * const usart__rx_complete_callback_t* p_callback) |
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487 | * |
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488 | * \brief Set a callback to call when receive byte complete interrupt is generated. |
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489 | * |
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490 | * \param[in] p_callback Callback to set. |
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491 | ******************************************************************************/ |
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492 | void |
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493 | usart0__set_rx_complete_callback |
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494 | ( |
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495 | const usart__rx_complete_callback_t* p_callback |
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496 | ){ |
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497 | // Check the preconditions. |
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498 | assert(NULL != p_callback); |
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499 | |||
500 | p_rx_complete = p_callback; |
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501 | } |
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502 | |||
503 | /**************************************************************************//** |
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504 | * |
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505 | ******************************************************************************/ |
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506 | void |
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507 | usart0__enable_tx_complete_interrupt |
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508 | ( |
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509 | void |
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510 | ){ |
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511 | BIT__SET(UCSR0B, TXCIE0); |
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512 | sei(); |
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513 | } |
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514 | |||
515 | /**************************************************************************//** |
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516 | * |
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517 | ******************************************************************************/ |
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518 | void |
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519 | usart0__disable_tx_complete_interrupt |
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520 | ( |
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521 | void |
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522 | ){ |
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15 | jlesech | 523 | BIT__RST(UCSR0B, TXCIE0); |
12 | jlesech | 524 | sei(); |
525 | } |
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526 | |||
527 | /**************************************************************************//** |
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528 | * |
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529 | ******************************************************************************/ |
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530 | void |
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531 | usart0__set_tx_complete_callback |
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532 | ( |
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533 | const usart__tx_complete_callback_t* p_callback |
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534 | ){ |
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535 | // Check the preconditions. |
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536 | assert(NULL != p_callback); |
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537 | |||
538 | p_tx_complete = p_callback; |
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539 | } |
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540 | |||
541 | /**************************************************************************//** |
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542 | * |
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543 | ******************************************************************************/ |
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544 | void |
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545 | usart0__enable_data_register_empty_interrupt |
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546 | ( |
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547 | void |
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548 | ){ |
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549 | BIT__SET(UCSR0B, UDRIE0); |
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550 | sei(); |
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551 | } |
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552 | |||
553 | /**************************************************************************//** |
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554 | * |
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555 | ******************************************************************************/ |
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556 | void |
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557 | usart0__disable_data_register_empty_interrupt |
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558 | ( |
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559 | void |
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560 | ){ |
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15 | jlesech | 561 | BIT__RST(UCSR0B, UDRIE0); |
12 | jlesech | 562 | sei(); |
563 | } |
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564 | |||
565 | /**************************************************************************//** |
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566 | * |
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567 | ******************************************************************************/ |
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568 | void |
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569 | usart0__set_data_register_empty_callback |
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570 | ( |
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571 | const usart__data_register_empty_callback_t* p_callback |
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572 | ){ |
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573 | // Check the preconditions. |
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574 | assert(NULL != p_callback); |
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575 | |||
576 | p_data_register_empty = p_callback; |
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577 | } |
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578 | |||
579 | /****************************************************************************** |
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580 | * Private function definitions. |
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581 | ******************************************************************************/ |
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582 | |||
583 | /**************************************************************************//** |
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584 | * \fn static uint16_t usart0__compute_ubrr(void) |
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585 | * |
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586 | * \brief Compute ubrr value. |
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587 | * |
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588 | * \return ubrr value. |
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589 | ******************************************************************************/ |
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590 | static inline |
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591 | uint16_t |
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592 | usart0__compute_ubrr |
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593 | ( |
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594 | void |
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595 | ){ |
||
596 | uint16_t ubrr = 0; |
||
597 | |||
598 | switch (configuration.mode) |
||
599 | { |
||
600 | case USART__MODE__ASYNCHRONOUS: |
||
601 | { |
||
602 | if (!double_speed_is_set) |
||
603 | { |
||
604 | ubrr = F_CPU / (16 * configuration.baudrate) - 1; |
||
605 | } |
||
606 | else |
||
607 | { |
||
608 | ubrr = F_CPU / (8 * configuration.baudrate) - 1; |
||
609 | } |
||
610 | } |
||
611 | break; |
||
612 | |||
613 | case USART__MODE__SYNCHRONOUS: |
||
614 | { |
||
615 | ubrr = F_CPU / (2 * configuration.baudrate) - 1; |
||
616 | } |
||
617 | break; |
||
618 | |||
619 | case USART__MODE__MASTER_SPI: |
||
620 | break; |
||
621 | |||
622 | default: |
||
623 | break; |
||
624 | } |
||
625 | |||
626 | return ubrr; |
||
627 | } |
||
628 | |||
629 | /****************************************************************************** |
||
630 | * Interrupt vectors. |
||
631 | ******************************************************************************/ |
||
632 | |||
633 | /**************************************************************************//** |
||
634 | * \fn ISR(USART_RX_vect) |
||
635 | ******************************************************************************/ |
||
636 | ISR(USART0_RX_vect) |
||
637 | { |
||
638 | if (NULL != p_rx_complete) |
||
639 | { |
||
640 | p_rx_complete(); |
||
641 | } |
||
642 | } |
||
643 | |||
644 | /**************************************************************************//** |
||
645 | * \fn ISR(USART_TX_vect) |
||
646 | ******************************************************************************/ |
||
647 | ISR(USART0_TX_vect) |
||
648 | { |
||
649 | if (NULL != p_tx_complete) |
||
650 | { |
||
651 | p_tx_complete(); |
||
652 | } |
||
653 | } |
||
654 | |||
655 | /**************************************************************************//** |
||
656 | * \fn ISR(USART_UDRE_vect) |
||
657 | ******************************************************************************/ |
||
658 | ISR(USART0_UDRE_vect) |
||
659 | { |
||
660 | if (NULL != p_data_register_empty) |
||
661 | { |
||
662 | p_data_register_empty(); |
||
663 | } |
||
664 | } |